The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7911568 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 22, 2011

Filed:

Oct. 21, 2005
Applicants:

Jin-goo Jung, Seoul, KR;

Chun-gi You, Gyeonggi-do, KR;

Inventors:

Jin-Goo Jung, Seoul, KR;

Chun-Gi You, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/40 (2006.01); G02F 1/1335 (2006.01); G02F 1/1343 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
Abstract

A thin film transistor array panel is provided, which includes: a semiconductor layer; a first insulating layer on the semiconductor layer; a gate line including a first amorphous silicon layer and a metal; a second insulating layer covering the gate line; and a data line formed on the second insulating layer. A variously tapered structure of the signal line may be formed by providing an amorphous silicon layer having good adhesion characteristics. The adhesion between the metal layer and the amorphous silicon layer may be improved by performing a thermal treatment process such that the contact resistance may be reduced therebetween. Accordingly, the characteristics and reliability of the TFT may be improved.


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Jung, Jin-Goo. (2011). Multi-layered thin films, thin film transistor array panel including the same, and method of manufacturing the panel (U.S. Patent No. 7911568). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7911568

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