The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2011

Filed:

Feb. 04, 2008
Applicants:

Andrew Steven Dzurak, Darlinghurst, AU;

Sobhath Ramesh Ekanayake, Glenwood, AU;

Robert Graham Clark, Balgowlah Heights, AU;

Torsten Lehmann, Earlwood, AU;

Inventors:

Andrew Steven Dzurak, Darlinghurst, AU;

Sobhath Ramesh Ekanayake, Glenwood, AU;

Robert Graham Clark, Balgowlah Heights, AU;

Torsten Lehmann, Earlwood, AU;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

This invention concerns interfacing to electronic circuits or systems operating at low temperature or ultra-low temperature using complementary metal-oxide semiconductor (CMOS) technology. Low temperature in this case refers to cryogenic temperatures in particular, but not exclusively, to the 4.2 K region. Ultra-low temperatures here refers to the sub-1 K range, usually accessed using dilution refrigerator systems. The electronic circuits comprise a controller (for writing and manipulation), an observer (for readout and measurement) circuits, or both, fabricated from ultra-thin silicon-on-insulator (SOI) CMOS technology.


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