The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2011

Filed:

Feb. 25, 2008
Applicants:

Franco Motika, Hopewell Junction, NY (US);

Michael R. Ouellette, Westford, VT (US);

Phong T. Tran, Highland, NY (US);

Inventors:

Franco Motika, Hopewell Junction, NY (US);

Michael R. Ouellette, Westford, VT (US);

Phong T. Tran, Highland, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

A structural design-for-test for diagnosing broken scan chain defects of long non-scannable register chains (GPTR) The GPTR and the system for testing and diagnosing the broken LSSD scan-only chains rapidly localize defects to the failing Shift Register Latch (SRL) pair. The GPTR modifies the latches used in the GPTR scan chain to standard LSSD L/Lmaster-slave SRL type latch pairs; connects all the system ports of the Llatches to the Shift Register Input (SRI) and clocked by the system C-clk while the Lscan port is clocked by the A-clk and Lscan port is clocked only by the B-clk. The Llatches are connected to at least one multiplexer having a first output connected to an input of each odd SRL, and a second output connected to an input port of each even SRL. In another embodiment, the GPTR includes a plurality of multiplexers respectively coupled to the master-slave latch pairs, wherein a first set of multiplexers have their respective output attached to an input of the odd Llatches, and a second set of the multiplexers have their respective output attached to an input port of the even Llatches.


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