Power reduction technique for buffered crossbar switch

Abstract

A communication system that includes a packet switch having a buffered crossbar for routing data packets from input ports to output ports of the packet switch. The buffered crossbar stores a data packet received from an input port based on a clock signal of a clock domain and sends the data packet to an output port of the packet switch based on a clock signal of another clock domain. In this way, the buffered crossbar functions as a clock domain boundary between the input port and the output port. Moreover, the frequency of one or both of the clock signals may be selected to minimize power consumption in the packet switch or to select a tradeoff between power consumption and performance of the packet switch.