The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2011

Filed:

Nov. 30, 2004
Applicants:

Yoshito Shimizu, Yokohama, JP;

Noriaki Saito, Machida, JP;

Inventors:

Yoshito Shimizu, Yokohama, JP;

Noriaki Saito, Machida, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J 3/00 (2006.01); H04B 1/04 (2006.01); H04B 1/06 (2006.01); H04L 27/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

A reception apparatus capable of preventing saturation and sensitivity degradation of a receiver when base transceiver station transmit power control is performed and calibrating offset voltage without increasing the amount of current consumption. In this apparatus, a gain setting section () estimates reception field intensity of each time slot in the next frame based on information of the reception field intensity and transmit power information which is information of the transmit power of the base transceiver station and calculates a gain set value according to the estimated reception field intensity. A gain control circuit () extracts a maximum gain out of the gains set by the gain setting section (), uses the maximum gain as a set gain for DC offset voltage calibration and performs gain control at the gain set value corresponding to each time slot. A voltage calibration circuit () performs the DC offset voltage calibration of the received signal.


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