The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2011
Filed:
Sep. 22, 2008
Allan Parker, Austin, TX (US);
Allan Parker, Austin, TX (US);
Spansion LLC, Sunnyvale, CA (US);
Abstract
Aspects describe a system and method for using a high voltage state as an erase condition in a flash device. Logical cell mapping is changed from using a single physical memory cell to using two adjacent physical cells as a single logical cell, thereby creating a single program and erase entity. Logical cell erase, program, and/or read can be accomplished by using two channel regions in union. This combination can allow for single logical cell erasure in a flash device and the use of a high voltage state as an erased state. A default erased state can be a high voltage state. As a result, program operations can be performed by changing a voltage state of the single program and erase entity to a low voltage state, and erase operations can be performed by changing a voltage state of the single program and erase entity to a high voltage state.