The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2011
Filed:
Oct. 12, 2006
Naoki Kitai, Akishima, JP;
Satoru Hanzawa, Hachioji, JP;
Akira Kotabe, Hino, JP;
Renesas Electronics Corporation, Kawasaki-shi, JP;
Abstract
In a readout circuit (RC) which detects a difference between a change that appears on a first signal line (CBL) and a change that appears on a second signal line (CBLdm) according to stored information of each selected memory cell, the first signal line and the second signal line are separated selectively from input nodes of a data latch circuit (DL) through second MOS transistors (MNand MN) and capacitively coupled to the input nodes of the data latch circuit via gates of first MOS transistors (MPand MP) respectively. In this separated state, the first and second signal lines and the input nodes of the data latch circuit are precharged to different voltages, so that the gate-to-source and drain-to-source voltages of the first MOS transistors are controlled by the voltages of the first and second signal lines respectively. Therefore, when the first and second signal lines are varied and the separated state is released upon a read operation, the first MOS transistors start to operate in a saturated region, thereby realizing a high-speed read operation.