The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2011
Filed:
May. 06, 2008
Mine-yuan Huang, Taipei, TW;
Chun Chang, Taipei, TW;
Mine-Yuan Huang, Taipei, TW;
Chun Chang, Taipei, TW;
Princeton Technology Corporation, Taipei County, TW;
Abstract
An ESD prevention circuit is provided. The ESD prevention circuit comprises a voltage source, a charge-blocking unit, a first PMOS transistor, a first NMOS transistor, a second NMOS transistor, and an output unit. The charge-blocking unit is coupled to the voltage source and provides a reverse voltage to control the voltage source to remain at a zero potential when an electrostatic voltage is being generated. The first PMOS transistor is coupled to the charge-blocking unit. The first NMOS transistor is coupled to the first PMOS transistor. The second NMOS transistor is coupled to the first PMOS transistor and the first NMOS transistor. The output unit is coupled to the second NMOS transistor. The electrostatic voltage is affected by the charge-blocking unit and does not raise impendence of the turned-on second NMOS transistor.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile