The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2011
Filed:
Jan. 30, 2007
Rod Del Rosario, Cupertino, CA (US);
John Nguyen, San Jose, CA (US);
Anton Rahardja, San Jose, CA (US);
Rod Del Rosario, Cupertino, CA (US);
John Nguyen, San Jose, CA (US);
Anton Rahardja, San Jose, CA (US);
MCDATA Corporation, San Jose, CA (US);
Abstract
In one implementation, a PCB having an array of vias and electrical terminals disposed on the side of the PCB opposite the side configured to receive a grid array package are disclosed herein. The array of vias have pads and forms a pattern of repetitive rows and columns. A substantially consistent intervia distance is defined along an intervia axis between each adjacent via in each of the rows and columns. A pair of electrical terminals are positioned adjacent one another along an electrical terminal axis between at least two of the vias and the electrical terminal axis intersects the intervia axis. In another implementation, a group of four adjacent vias form a substantially rectangular shape having one of four vias positioned at each of four corners of the rectangular shape. One electrical terminal is positioned within the four vias without contacting any of the four vias.