The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2011
Filed:
Aug. 07, 2008
Shuichi Ueno, Tokyo, JP;
Haruo Furuta, Tokyo, JP;
Ryoji Matsuda, Tokyo, JP;
Tatsuya Fukumura, Tokyo, JP;
Shin Hasegawa, Tokyo, JP;
Shinya Hirano, Tokyo, JP;
Hiroyuki Chibahara, Tokyo, JP;
Hiroshi Oshita, Tokyo, JP;
Shuichi Ueno, Tokyo, JP;
Haruo Furuta, Tokyo, JP;
Ryoji Matsuda, Tokyo, JP;
Tatsuya Fukumura, Tokyo, JP;
Shin Hasegawa, Tokyo, JP;
Shinya Hirano, Tokyo, JP;
Hiroyuki Chibahara, Tokyo, JP;
Hiroshi Oshita, Tokyo, JP;
Renesas Electronics Corporation, Tokyo, JP;
Abstract
A method for manufacturing a magnetic memory device which includes a TMR element, and the method includes: a step of forming a lower wiring layer; a step of forming an interlayer insulating layer on the lower wiring layer; a step of forming an opening in the interlayer insulating layer so that the lower wiring layer is exposed; a step of forming a barrier metal layer so that the interlayer insulating layer and an inner surface of the opening are covered; a step of forming a metal layer on the barrier metal layer so that the opening is embedded; a polishing step of removing the metal layer on the barrier metal layer through polishing using the barrier metal layer as a stopper so that a wiring layer that includes a metal layer being embedded in the opening and the barrier metal layer is formed; and an element fabricating step of fabricating a TMR element on the wiring layer.