The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 08, 2011
Filed:
May. 22, 2008
Jonathan P. Ebbers, Essex Junction, VT (US);
Todd E. Leonard, Williston, VT (US);
Kyle E. Schneider, Bristol, VT (US);
Peter A. Twombly, Shelburne, VT (US);
Jonathan P. Ebbers, Essex Junction, VT (US);
Todd E. Leonard, Williston, VT (US);
Kyle E. Schneider, Bristol, VT (US);
Peter A. Twombly, Shelburne, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Disclosed is a system-on-chip (SOC) structure that allows for automated integration of multiple intellectual cores. The SOC structure incorporates a plurality of cells connected to a common bus on a chip. Each cell incorporates a functional core and an automated integration unit (AIU) connected to the functional core. Each AIU communicates integration information for its functional core over the common bus to the AIUs in the other cells. The exchange of information between the AIUs is controlled either by the integration units themselves or by a controller. Based on received integration information, each AIU can automatically make any required configuration adjustments for integration. Furthermore, based on this exchange of information, the functional cores can interact, as necessary, during SOC operation. Also disclosed are an associated method of forming such a SOC structure and a design structure for such an SOC structure.