The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2011

Filed:

Sep. 11, 2008
Applicants:

Donghun Yu, Seoul, KR;

Kyoung Lae Cho, Yongin-si, KR;

Dongku Kang, Yongin-si, KR;

Dong Hyuk Chae, Seoul, KR;

Jun Jin Kong, Yongin-si, KR;

Inventors:

Donghun Yu, Seoul, KR;

Kyoung Lae Cho, Yongin-si, KR;

Dongku Kang, Yongin-si, KR;

Dong Hyuk Chae, Seoul, KR;

Jun Jin Kong, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed are a memory device and a memory data reading method. The memory device may include a multi-bit cell array, a threshold voltage detecting unit configured to detect first threshold voltage intervals including threshold voltages of multi-bit cells of the multi-bit cell array from among a plurality of threshold voltage intervals, a determination unit configured to determine data of a first bit layer based on the detected first threshold voltage intervals, and an error detection unit configured to detect an error bit of the data of the first bit layer. In this instance, the determination unit may determine data of a second bit layer using a second threshold voltage interval having a value of the first bit layer different from the detected error bit and being nearest to a threshold voltage of a multi-bit cell corresponding to the detected error bit.


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