The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2011

Filed:

Oct. 17, 2008
Applicants:

Christopher M. Abernathy, Austin, TX (US);

Jeffrey P. Bradford, Rochester, MN (US);

Ronald P. Hall, Cedar Park, TX (US);

Timothy H. Heil, Rochester, MN (US);

David Shippy, Austin, TX (US);

Inventors:

Christopher M. Abernathy, Austin, TX (US);

Jeffrey P. Bradford, Rochester, MN (US);

Ronald P. Hall, Cedar Park, TX (US);

Timothy H. Heil, Rochester, MN (US);

David Shippy, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/312 (2006.01);
U.S. Cl.
CPC ...
Abstract

Mechanisms for handling data cache misses out-of-order for asynchronous pipelines are provided. The mechanisms associate load tag (LTAG) identifiers with the load instructions and uses them to track the load instruction across multiple pipelines as an index into a load table data structure of a load target buffer. The load table is used to manage cache 'hits' and 'misses' and to aid in the recycling of data from the L2 cache. With cache misses, the LTAG indexed load table permits load data to recycle from the L2 cache in any order. When the load instruction issues and sees its corresponding entry in the load table marked as a “miss,” the effects of issuance of the load instruction are canceled and the load instruction is stored in the load table for future reissuing to the instruction pipeline when the required data is recycled.


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