The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2011

Filed:

Nov. 05, 2008
Applicants:

Gul Bahar Basim, Plano, TX (US);

Serkan Kincal, Mountain View, CA (US);

Eugene C. Davis, McKinney, TX (US);

Inventors:

Gul Bahar Basim, Plano, TX (US);

Serkan Kincal, Mountain View, CA (US);

Eugene C. Davis, McKinney, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 19/00 (2006.01); B24B 49/00 (2006.01); B24B 51/00 (2006.01); B24B 1/00 (2006.01); H01L 21/302 (2006.01); H01L 21/461 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of conditioning a CMP polishing pad to attain a desired thickness profile in a polished layer on a wafer is disclosed. The incoming thickness profile of the layer to be polished, the thickness profile of the polishing pad, a polish rate of layer as a function of pressure and the removal rate of polishing pad material by a conditioning block are used to compute a sweep pattern for the conditioning block which will produce a desired thickness profile on the polishing pad. The method may be applied to maintaining the desired profile on the polishing pad during the course of polishing multiple wafers. The pad profile may be adjusted to keep pressure between the pad and the wafer to a safe limit to reduce polishing defects.


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