The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7898860 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 01, 2011

Filed:

Aug. 18, 2009
Applicant:

Shinichi Yamamoto, Kasugai, JP;

Inventor:

Shinichi Yamamoto, Kasugai, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device has a nonvolatile memory cell to which data writing operation is limited to a predetermined logic value. In the case of rewriting data '10101010' written in a first memory core to data '01010101', since the data writing operation includes writing of a logic value “1” opposite to the predetermined logic value, an erasing operation is needed and the data writing is regulated. By rewriting a pointer value stored in a pointer memory in place of performing the erasing operation, an operation of switching a memory core to be selected to a second memory core (data “11111111”) is performed. Data is newly written into the second memory core selected by the rewritten pointer value.


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Yamamoto, Shinichi. (2011). Semiconductor memory device and method of controlling semiconductor memory device (U.S. Patent No. 7898860). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7898860

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