The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 01, 2011
Filed:
Apr. 24, 2009
Weihong Qui, San Jose, CA (US);
Chun Cheung, Brooklyn, NY (US);
Emil Chen, Hillsborough, NJ (US);
Paul Sferrazza, Fleminton, NJ (US);
Robert Isham, Flemington, NJ (US);
Weihong Qui, San Jose, CA (US);
Chun Cheung, Brooklyn, NY (US);
Emil Chen, Hillsborough, NJ (US);
Paul Sferrazza, Fleminton, NJ (US);
Robert Isham, Flemington, NJ (US);
Intersil Americas Inc., Milpitas, CA (US);
Abstract
A phase doubler driver circuit includes first control logic generates a first output PWM drive signal and a second output PWM drive signal responsive to an input PWM drive signal. In a first mode of operation, alternating pulses of the input PWM drive are output as the first output PWM drive signal and the second PWM output drive signal respectively. In a second mode of operation, the input PWM drive signal is provided as the first output PWM drive signal when a second phase current associated with the second output PWM drive signal exceeds a first phase current associated with the first output PWM drive signal and the input PWM drive signal is provided as the second output PWM drive signal when the phase current associated with the first output PWM signal exceed the phase current associated with the second output PWM signal. Second control logic adds an offset to a falling edge of the first output PWM drive signal responsive to a difference between a first current associated with the first phase current and an average current and for adding the offset to a falling edge of the second output PWM signal responsive to a difference between a second current associated with the second phase current.