The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 2011

Filed:

May. 21, 2008
Applicants:

Dharin Shah, Bangalore, IN;

Clive David Bittlestone, Allen, TX (US);

Graham Mcleod Barr, Allen, TX (US);

Girishankar Gurumurthy, Bangalore, IN;

Pavan Vithal Torvi, Bangalore, IN;

Inventors:

Dharin Shah, Bangalore, IN;

Clive David Bittlestone, Allen, TX (US);

Graham McLeod Barr, Allen, TX (US);

Girishankar Gurumurthy, Bangalore, IN;

Pavan Vithal Torvi, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Generating cells with increased signal routing resources. In an embodiment, power and ground buses in a metal layer of a source cell are identified and removed. Any vias terminating on the removed buses may also be removed. Additional via and connections are added to other desired layers to provide connectivity to the nodes disconnected due to the earlier removal. According to an aspect of the present invention, such connections are added during a chip design phase (i.e., when the cell instances are incorporated into an integrated circuit, sought to be designed).


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