The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 22, 2011
Filed:
Oct. 17, 2007
Christopher Carney, Red Hook, NY (US);
Jose Luis Pontes Correia Neves, Poughkeepsie, NY (US);
Biagio Pluchino, Lagrangeville, NY (US);
Christopher Carney, Red Hook, NY (US);
Jose Luis Pontes Correia Neves, Poughkeepsie, NY (US);
Biagio Pluchino, Lagrangeville, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system for improving a logic circuit may include a processor, and a logic circuit analyzer in communication with the processor to model a plurality of nets. The system may also include an interface in communication with the logic circuit analyzer to select a target slack-value for each one of the plurality of nets. The logic circuit analyzer may determine a slack-value for each net. In addition, the logic circuit analyzer may selectively reduce resistive-capacitive delay for each net respectively if the determined slack-value is less than the target slack-value for each respective net.