The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 2011

Filed:

May. 11, 2007
Applicants:

Jack Chui, Fremont, CA (US);

Toan D. DO, San Jose, CA (US);

Kok Siong Tee, Gelugor, MY;

Inventors:

Jack Chui, Fremont, CA (US);

Toan D. Do, San Jose, CA (US);

Kok Siong Tee, Gelugor, MY;

Assignee:

Altera Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/0175 (2006.01);
U.S. Cl.
CPC ...
Abstract

Hotsocket detection circuitry is provided for detecting hotsocket conditions in integrated circuits such as programmable logic device integrated circuits. Power-on-reset circuitry may provide a power-on-reset signal that is indicative of when power supply voltages are ready to power circuitry on the integrated circuit for normal operation. A delay circuit that is powered by a power supply voltage may receive the power-on-reset signal and may generate a corresponding delayed version of the power-on-reset signal. The delayed version of the power-on-reset signal may be provided to the hotsocket detection circuitry to ensure that the hotsocket detection circuitry produces a hotsocket signal that transitions after a transition in the power-on-reset signal. The delay circuit may include one or more inverter stages.


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