The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 2011

Filed:

Jan. 16, 2009
Applicants:

Marian Udrea Spenea, San Jose, CA (US);

Serban Mihai Popescu, San Carlos, CA (US);

Laszlo Lipcsei, Campbell, CA (US);

Inventors:

Marian Udrea Spenea, San Jose, CA (US);

Serban Mihai Popescu, San Carlos, CA (US);

Laszlo Lipcsei, Campbell, CA (US);

Assignee:

O2Micro International Limited, SMB, Georgetown, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A transistor comprises a substrate of a first conductivity type, a drain region and a source region of a second conductivity type, a gate, a gate oxide layer, an adjustment implant region of the first conductivity type and a planar junction. The drain region and the source region are disposed in the substrate. The gate is placed over the substrate between the source region and the drain region. The gate is separated from the substrate by the gate oxide layer. The adjustment implant region is disposed under the gate oxide layer and in the substrate. A second doping concentration of the adjustment implant region is higher than a first doping concentration of the substrate. The adjustment implant region and the drain region in a predetermined shape form the planar junction with a surface curvature pointing towards the drain region to relax electrical field intensity at a location of the planar junction.


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