The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 22, 2011
Filed:
Apr. 29, 2009
Alan J. Magnus, Gilbert, AZ (US);
Justin E. Poarch, Gilbert, AZ (US);
Jason R. Wright, Chandler, AZ (US);
Alan J. Magnus, Gilbert, AZ (US);
Justin E. Poarch, Gilbert, AZ (US);
Jason R. Wright, Chandler, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method () for processing a panel () during semiconductor device () fabrication entails forming grooves () in a surface () of the panel () coincident with a dicing pattern () for the panel (). The grooves () extend partially through the panel () so that the panel () remains intact. The grooves () relieve stress in the panel () to reduce panel () warpage, thus enabling the panel () to be reliably held on a support structure () via vacuum when undergoing further processing, such as solder printing (). The method () further entails, dicing () through the panel () from the surface () in accordance with the dicing pattern () while the panel () is mounted on the support structure () to singularize the semiconductor devices ().