The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 15, 2011
Filed:
Apr. 05, 2005
Ariel Hendel, Cupertino, CA (US);
Yatin Gajjar, Fremont, CA (US);
May Lin, Saratoga, CA (US);
Rahoul Puri, Los Altos, CA (US);
Michael Wong, Cupertino, CA (US);
Ariel Hendel, Cupertino, CA (US);
Yatin Gajjar, Fremont, CA (US);
May Lin, Saratoga, CA (US);
Rahoul Puri, Los Altos, CA (US);
Michael Wong, Cupertino, CA (US);
Oracle America, Inc., Redwood City, CA (US);
Abstract
A method and apparatus for mapping sessions to preassigned processing entities in a network system. A network interface unit is operably connected to a plurality of processing entities and a plurality of memory units that define a shared memory space. The network interface unit further comprises a memory access module that includes a plurality of memory access channels, a packet classifier, and a plurality of scheduling control modules that are operable to control processing of data transported by the network. In various embodiments of the invention, predetermined subsets of the plurality of processing entities are operably associated with predetermined subsets of the plurality of memory units thereby defining a plurality of asymmetrical data processing partitions. The packet classifier is operable to provide an association between packets and the plurality of asymmetrical data processing partitions based upon an association with a predetermined session. In various embodiments of the invention, the asymmetrical data processing partitions can comprise a plurality of processor cores, a single processor core, a combination of strands of an individual processor core or a single strand of an individual processor core. The asymmetrical data processing partitions are scalable by adding additional processing entities.