The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2011

Filed:

Sep. 22, 2008
Applicants:

Yuxin Wang, Sunnyvale, CA (US);

Feng Pan, Fremont, CA (US);

Byungki Woo, San Jose, CA (US);

Trung Pham, Fremont, CA (US);

Khin Htoo, Sunnyvale, CA (US);

Inventors:

Yuxin Wang, Sunnyvale, CA (US);

Feng Pan, Fremont, CA (US);

Byungki Woo, San Jose, CA (US);

Trung Pham, Fremont, CA (US);

Khin Htoo, Sunnyvale, CA (US);

Assignee:

SanDisk Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

Techniques and corresponding circuitry for deriving a supply a bias voltage for a memory cell array from a received reference voltage is presented. The circuit includes a voltage determination circuit, which is connected to receive the reference voltage and generate from it the bias voltage, a temperature sensing circuit, and a calibration circuit. The calibration circuit is connected to receive the bias voltage and to receive a temperature indication from the temperature sensing circuit and determine from the bias voltage and temperature indication a compensation factor that is supplied to the voltage determination circuit, which adjusts the bias voltage based upon the compensation factor.


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