The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2011

Filed:

Jun. 13, 2008
Applicants:

Jae Kyoung Mun, Daejeon, KR;

Dong Young Kim, Daejeon, KR;

Jong Won Lim, Daejeon, KR;

Ho Kyun Ahn, Daejeon, KR;

Hae Cheon Kim, Daejeon, KR;

Hyun Kyu Yu, Daejeon, KR;

Inventors:

Jae Kyoung Mun, Daejeon, KR;

Dong Young Kim, Daejeon, KR;

Jong Won Lim, Daejeon, KR;

Ho Kyun Ahn, Daejeon, KR;

Hae Cheon Kim, Daejeon, KR;

Hyun Kyu Yu, Daejeon, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01P 1/10 (2006.01); H01P 3/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a switching circuit for a millimeter waveband control circuit. The switching circuit for a millimeter waveband control circuit includes a switching cell disposed on a signal port path to match an interested frequency and including at least one transistor coupled vertically to an input/output transmission line and a plurality of ground via holes disposed symmetrically in an upper portion and a lower portion of the input/output transmission line; capacitors for stabilizing a bias of the switching cell; and bias pads coupled in parallel to the capacitor to control the switching cell. Therefore, the switching circuit may be useful to improve its isolation by simplifying its design and layout through the use of symmetrical structure of optimized switching cells without the separate use of different switch elements, and also to reduce its manufacturing cost through the improved yield of the manufacturing process and the enhanced integration since it is possible to reduce a chip size of an integrated circuit in addition to its low insertion loss.


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