The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2011

Filed:

Mar. 25, 2010
Applicants:

Matthew Davidson, Mountain View, CA (US);

Ralph Heron, Morgan Hill, CA (US);

Lakhdar Iguelmamene, San Jose, CA (US);

Rony Tal, Los Altos, CA (US);

Asher Druck, Nahariya, IL;

Inventors:

Matthew Davidson, Mountain View, CA (US);

Ralph Heron, Morgan Hill, CA (US);

Lakhdar Iguelmamene, San Jose, CA (US);

Rony Tal, Los Altos, CA (US);

Asher Druck, Nahariya, IL;

Assignee:

SanDisk Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/0175 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An interface for use of device whose core circuitry operates in one voltage domain, but exchanges signal with another device (or 'host') according a different voltage domain, and the use of such an interface for supplying data using a double data rate (DDR) transfer, is presented. One concrete example of this situation is a memory card, where the internal circuitry uses one voltage range for its core operating voltages, but exchanges signals with a host using different, input/output voltage range. According to a general set of aspects, the interface receives data signals from the device at the device's core operating voltage domain, individually level shifts these to the input/output voltage domain, and then combines them into a DDR signal for transfer to the host device, where a (non-level shifted) clock signal from the host device is used as the select signal to form the DDR data signal.


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