The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 08, 2011

Filed:

Dec. 21, 2006
Applicants:

Iwao Honda, Gunma, JP;

Hideki Ohashi, Gunma, JP;

Takashi Kuroda, Gunma, JP;

Noriyuki Tomita, Gunma, JP;

Inventors:

Iwao Honda, Gunma, JP;

Hideki Ohashi, Gunma, JP;

Takashi Kuroda, Gunma, JP;

Noriyuki Tomita, Gunma, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An encoding circuit is disclosed which comprises: a data-for-encoding storing register that stores n-bit data for encoding; a data-for-calculation storing register that stores m-bit data for calculation generated by shifting the data for encoding; a shifter that shifts the data for encoding stored in the data-for-encoding storing register, and shifts and inputs the shifted data into the data-for-calculation storing register; a first coefficient register that stores m-bit first coefficient data indicating a first coefficient for executing encoding; a first logic circuit that is inputted with the data for calculation stored in the data-for-calculation storing register and the first coefficient data stored in the first coefficient register and outputs the logical product for each bit of the data for calculation and the first coefficient data; and a second logic circuit that is inputted with m-bit data outputted from the first logic circuit and outputs the exclusive logical sum of the m-bit data as the encoded data.


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