The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 08, 2011
Filed:
Oct. 19, 2006
Daisuke Murakami, Kyoto, JP;
Yuji Takai, Osaka, JP;
Takahide Baba, Hyogo, JP;
Panasonic Corporation, Osaka, JP;
Abstract
A clock enable (CKE) control circuit () is provided between a memory control circuit () and a SDRAM (). When a system is in, e.g., a sleep state, the CKE control circuit () controls a CKE signal outputted to the SDRAM () such that it is fixed to a Low level. As a result, it is possible to halt a power supply provided to the memory control circuit (), while maintaining the low-power-consumption mode of the SDRAM (), so that power consumption resulting from a leakage current is suppressed. In addition, it becomes also possible to reset the memory control circuit (), while maintaining the low-power-consumption mode of the SDRAM ().