The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 08, 2011

Filed:

Oct. 19, 2007
Applicants:

Bum-gee Baek, Suwon, KR;

Kwon-young Choi, Seoul, KR;

Young-joon Rhee, Seoul, KR;

Bong-joo Kang, Bunsan, KR;

Seung-taek Lim, Seoul, KR;

Hyang-shik Kong, Suwon, KR;

Won-joo Kim, Seoul, KR;

Inventors:

Bum-Gee Baek, Suwon, KR;

Kwon-Young Choi, Seoul, KR;

Young-Joon Rhee, Seoul, KR;

Bong-Joo Kang, Bunsan, KR;

Seung-Taek Lim, Seoul, KR;

Hyang-Shik Kong, Suwon, KR;

Won-Joo Kim, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Gate lines are formed on a substrate. A gate insulating layer, an intrinsic a-Si layer, an extrinsic a-Si layer, a lower film of Cr and an upper film of Al containing metal are sequentially deposited. A photoresist having thicker first portions on wire areas and thinner second portions on channel areas is formed on the upper film. The upper film on remaining areas are wet-etched, and the lower film and the a-Si layers on the remaining areas are dry-etched along with the second portions of the photoresist. The upper film, the lower film, and the extrinsic a-Si layer on the channel areas are removed. The removal of the upper film and the lower film on the channel areas are performed by wet etching, and the first portions of the photoresist are removed after the removal of the upper film on the channel areas.


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