The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2011

Filed:

Nov. 21, 2007
Applicants:

Yu LI, Beijing, CN;

Guo Hui Lin, Beijing, CN;

Qiang Liu, Beijing, CN;

Yu Dong Yang, Beijing, CN;

Inventors:

Yu Li, Beijing, CN;

Guo Hui Lin, Beijing, CN;

Qiang Liu, Beijing, CN;

Yu Dong Yang, Beijing, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); H04B 1/38 (2006.01); H03K 19/173 (2006.01); G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a Field Programmable Gate Array (FPGA), a system for debugging a Field Programmable Gate Array, a method for debugging a Field Programmable Gate Array, a FPGA configuration data product and a method and system for configuring a FPGA. According to one aspect of the invention, there is provided a Field Programmable Gate Array (FPGA) having a logic unit under test and comprising: a probe signal selecting unit configured to select at least one probe point from a plurality of probe points in said logic unit under test, and obtain a probe signal at said probe point; and a high speed serial transceiver configured to convert said probe signal into a high speed serial signal and transmit it to outside.


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