The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2011

Filed:

Aug. 31, 2006
Applicant:

Mark D. Kuhns, Peoria, AZ (US);

Inventor:

Mark D. Kuhns, Peoria, AZ (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An embodiment of the present invention is directed to a circuit including a data relay stage configurable to receive primary data via a primary data interface, a primary clock having a frequency Fand a secondary clock having a frequency F. The primary data is received over a fixed periodic interval Tand at a rate substantially equal to F. The amount of primary data received over Tis known to be N. The data relay stage is further configurable to provide secondary data via a secondary data interface based on the primary data and the secondary clock. The circuit also includes a phase-locked loop (PLL) circuit configurable to receive an interval reference signal having a frequency Fsubstantially equal to 1/T. The PLL circuit is also configurable to provide the secondary clock based on the interval reference signal.


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