The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2011

Filed:

Nov. 08, 2004
Applicants:

Asami Yoshida, Tokyo, JP;

Minoru Matsuura, Kanagawa, JP;

Takashi Hirakawa, Kanagawa, JP;

Inventors:

Asami Yoshida, Tokyo, JP;

Minoru Matsuura, Kanagawa, JP;

Takashi Hirakawa, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

A display with a display unit is configured so that pixels are arrayed in a matrix. A clock pulse generating means generates clock pulses of any frequency. Based on the generated clock pulses, a pulse generating means generates timing signals for parallel arrangement processing video signals in units of a plurality of pixels as pulse signals enabling free setting of a pulse width and a pulse period. A phase deviation detecting means detects the amounts of phase deviation after write signals generated based on the timing signals and for writing video signals into the plurality of pixels pass through the display unit. The timing adjusting means automatically performs adjustment so that the amount of phase deviation is within the predetermined range (so that it becomes almost zero) based on the amounts of phase deviation detected by the phase deviation detecting means.


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