The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2011

Filed:

Feb. 19, 2010
Applicants:

Sunil Papanchand Khatri, College Station, TX (US);

Sheila Vaidya, Fremont, CA (US);

Timothy Kevin Griffin, Towson, MD (US);

Nikhil Jayakumar, Sunnyvale, CA (US);

Inventors:

Sunil Papanchand Khatri, College Station, TX (US);

Sheila Vaidya, Fremont, CA (US);

Timothy Kevin Griffin, Towson, MD (US);

Nikhil Jayakumar, Sunnyvale, CA (US);

Assignee:

Other;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to one aspect of the present disclosure, a circuit includes a semiconductor device including a plurality of logic blocks and a plurality of programmable interconnects. A delay detector generates a delay signal responsive to a measured delay of an output signal, wherein the output signal is from at least one of the plurality of logic blocks. A biasing circuit responsive to the delay signal to adjust subsequent measured delays toward a predetermined value.


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