The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2011

Filed:

Aug. 25, 2008
Applicants:

Haruo Kawakami, Miura, JP;

Yasushi Ogimoto, Tokyo, JP;

Inventors:

Haruo Kawakami, Miura, JP;

Yasushi Ogimoto, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/082 (2006.01);
U.S. Cl.
CPC ...
Abstract

A logic circuit with a simple configuration and good current efficiency is provided. The logic circuit includes a two-terminal bistable switching element () having characteristics which maintain states, a first switching element () one end of which is connected to one terminal of the two-terminal bistable switching element (), a second switching element () one end of which is connected to the other terminal of the two-terminal bistable switching element () via a resistance element (), and first and second pulse input terminals () respectively connected to the one terminal and the other terminal of the two-terminal bistable switching element (). A bias voltage is applied across the other end of the first switching element () and the other end of the second switching element (), and a trigger pulse is input from the first and second pulse input terminals ().


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