The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2011

Filed:

Aug. 19, 2008
Applicants:

David Oliver Burke, Balmain, AU;

Jan Waszczuk, Balmain, AU;

Desmond Bruce Boyton, Balmain, AU;

Craig Donald Strudwicke, Balmain, AU;

Peter John Morley Sobey, Balmain, AU;

William Granger, Balmain, AU;

Jason Mark Thelander, Balmain, AU;

Eric Patrick O'donnell, Balmain, AU;

Inventors:

David Oliver Burke, Balmain, AU;

Jan Waszczuk, Balmain, AU;

Desmond Bruce Boyton, Balmain, AU;

Craig Donald Strudwicke, Balmain, AU;

Peter John Morley Sobey, Balmain, AU;

William Granger, Balmain, AU;

Jason Mark Thelander, Balmain, AU;

Eric Patrick O'Donnell, Balmain, AU;

Assignee:

Silverbrook Research Pty Ltd, Balmain, New South Wales, AU;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B23P 17/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention provides for a method of attaching printhead integrated circuitry to a carrier. The method includes scanning a wafer having a number of circuitry dies formed thereon to demarcate respective dies, aligning a die picker with a dice on the wafer according to a wafer substrate mapping scheme, and removing the dice from the wafer with the die picker. The method further includes the steps of transporting the dice to a placement station operatively positioning the carrier, aligning the dice with the carrier; and heat bonding the dice to the carrier.


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