The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 25, 2011
Filed:
Aug. 17, 2007
Alan Gara, Mount Kisco, NY (US);
Thomas M. Gooding, Rochester, MN (US);
Todd A. Inglett, Rochester, MN (US);
Thomas A. Liebsch, Arlington, SD (US);
Thomas E. Musta, Rochester, MN (US);
Alan Gara, Mount Kisco, NY (US);
Thomas M. Gooding, Rochester, MN (US);
Todd A. Inglett, Rochester, MN (US);
Thomas A. Liebsch, Arlington, SD (US);
Thomas E. Musta, Rochester, MN (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Managing power in a parallel computer, the parallel computer including a power supply and a plurality of compute nodes, the plurality of compute nodes powered by the power supply through a plurality of DC-DC converters, each DC-DC converter supplying current to an assigned group of compute nodes, each DC-DC converter having a current sensor. Embodiments include monitoring, by the current sensor, an amount of current supplied by that DC-DC converter to its assigned group of compute nodes; determining, by at least one DC-DC converter, that the amount of current supplied is greater than a predefined threshold value; sending, by the at least one DC-DC converter to the plurality of compute nodes, a global interrupt, including notifying the plurality of compute nodes to reduce power consumption; and reducing, by the plurality of compute nodes in accordance with power consumption ratios, power consumption of the compute nodes.