The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 25, 2011
Filed:
Aug. 08, 2008
Deepanshu Dutta, Santa Clara, CA (US);
Jeffrey W. Lutze, San Jose, CA (US);
Yingda Dong, San Jose, CA (US);
Henry Chin, Palo Alto, CA (US);
Toru Ishigaki, Milpitas, CA (US);
Deepanshu Dutta, Santa Clara, CA (US);
Jeffrey W. Lutze, San Jose, CA (US);
Yingda Dong, San Jose, CA (US);
Henry Chin, Palo Alto, CA (US);
Toru Ishigaki, Milpitas, CA (US);
SanDisk Corporation, Milpitas, CA (US);
Abstract
Capacitive coupling from storage elements on adjacent bit lines is compensated by adjusting voltages applied to the adjacent bit lines. An initial rough read is performed to ascertain the data states of the bit line-adjacent storage elements, and during a subsequent fine read, bit line voltages are set based on the ascertained states and the current control gate read voltage which is applied to a selected word line. When the current control gate read voltage corresponds to a lower data state than the ascertained state of an adjacent storage element, a compensating bit line voltage is used. Compensation of coupling from a storage element on an adjacent word line can also be provided by applying different read pass voltages to the adjacent word line, and obtaining read data using a particular read pass voltage which is identified based on a data state of the word line-adjacent storage element.