The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 18, 2011
Filed:
Jan. 20, 2006
Manabu Kakino, Nara, JP;
Toru Okazaki, Osaka, JP;
Teppei Iwase, Osaka, JP;
Kazunori Takada, Osaka, JP;
Hiroaki Fujiwara, Osaka, JP;
Tomoaki Kuroishi, Hyogo, JP;
Manabu Kakino, Nara, JP;
Toru Okazaki, Osaka, JP;
Teppei Iwase, Osaka, JP;
Kazunori Takada, Osaka, JP;
Hiroaki Fujiwara, Osaka, JP;
Tomoaki Kuroishi, Hyogo, JP;
Panasonic Corporation, Osaka, JP;
Abstract
A method for analyzing a component mounting board comprising a step (A) for forming a multilayer substrate shell model of a multilayer wiring board, a step (B) for forming a multilayer component shell model divided by element division lines based on the bonding position of a component to the surface of the multilayer wiring board, step (C) for redividing the mounting position of the component in the multilayer substrate shell model, and step (D) for forming an analysis model by bonding the neutral plane of the substrate and the neutral plane of the component through one of a beam element and a solid element, i.e. a bonding element equivalent to mounting conditions of the component, wherein precision of analysis is enhanced while reducing computation cost by performing calculation while imparting boundary conditions to the analysis model.