The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 18, 2011
Filed:
Apr. 03, 2008
David A. Knol, San Jose, CA (US);
Abhishek Ranjan, Campbell, CA (US);
Salil Ravindra Raje, Saratoga, CA (US);
David A. Knol, San Jose, CA (US);
Abhishek Ranjan, Campbell, CA (US);
Salil Ravindra Raje, Saratoga, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A method of partitioning a design across a plurality of integrated circuits can include creating a software construct for each one of the plurality of integrated circuits and assigning a plurality of instances to a selected software construct. Each of the plurality of instances can be from a different logic hierarchy. The method further can include automatically adding at least one input/output buffer and port to the selected software construct to accommodate the plurality of instances and creating nets connecting the plurality of instances and the at least one input/output buffer and port within the selected software construct.