The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 18, 2011
Filed:
Feb. 07, 2007
Eiichi Shinada, Ibaraki, JP;
Masahiro Katou, Ibaraki, JP;
Noriaki Watanabe, Ibaraki, JP;
Hitachi Chemical Company, Ltd., Tokyo, JP;
Abstract
Provided is a method for manufacturing a multilayer wiring board, by which interlayer connection is efficiently performed and a non-penetrating hole having a hollow structure or a through hole can be formed at the same time without damaging a plated portion on the inner wall of the through hole. A first printed board () is provided with a wiring, which has a wiring section and a bump mounting pad (), and a substrate section. The method is provided with a step of forming a solder bump () on at least a bump mounting pad on the first printed board or a pad section of a second printed board () having the pad section () by using a solder paste, and a step of bonding the first printed board and the second printed board in layers by having an insulating adhesive () between the first printed board and the second printed board and electrically connecting the first printed board with the second printed board.