The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 11, 2011
Filed:
Jun. 05, 2006
Applicants:
Ning Xue, Fremont, CA (US);
Chong H. Lee, San Ramon, CA (US);
Inventors:
Ning Xue, Fremont, CA (US);
Chong H. Lee, San Ramon, CA (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A field-programmable gate array ('FPGA') or programmable logic device ('PLD') includes relatively general-purpose PLD core circuitry and relatively specialized high-speed serial interface (“HSSI”) hard IP circuitry. To better support applications that include forward error correction (“FEC”), some tasks related to FEC (e.g., FIFO operations) are performed in the PLD core circuitry, while other FEC tasks (e.g., FEC calculations) are performed in the HSSI hard IP circuitry.