The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 11, 2011

Filed:

Jun. 10, 2008
Applicants:

Zhu Hong, Shanghai, CN;

Jim Yang, Shanghai, CN;

Inventors:

Zhu Hong, Shanghai, CN;

Jim Yang, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/062 (2006.01); H01L 31/113 (2006.01); H01L 27/15 (2006.01); H01L 29/16 (2006.01); H01L 31/12 (2006.01); H01L 33/00 (2006.01); H01L 29/161 (2006.01); H01L 31/153 (2006.01); H01L 29/735 (2006.01); H01L 31/0328 (2006.01); H01L 31/0336 (2006.01); H01L 31/072 (2006.01); H01L 31/109 (2006.01); H01L 31/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system and method for sensing image on CMOS. According to an embodiment, the present invention provide a CMOS image sensing pixel. The pixel includes an n-type substrate, which includes a first width and a first thickness. The pixel also includes a p-type epitaxy layer overlying the n-type substrate. The p-type epitaxy layer includes a second width and a second thickness. The second width is associated with one or more characteristics of a colored light. The pixel additionally includes an n-type layer overlying the p-type epitaxy layer. The n-type layer is associated with a third width and a third thickness. Additionally, the pixel includes an pn junction formed between the p-type epitaxy layer and the n-type layer. Moreover, the pixel includes a control circuit being coupled to the CMOS image sensing pixel.


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