The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2011
Filed:
May. 30, 2008
Minqiu LI, Shenzhen, CN;
Feng Hong, Shenzhen, CN;
Chunming Sheng, Shenzhen, CN;
Tinghong Wang, Shenzhen, CN;
Xing Rao, Shenzhen, CN;
Jin Yu, Shenzhen, CN;
Shaolin Zhang, Shenzhen, CN;
Hansi Wang, Shenzhen, CN;
Dingliang Gan, Shenzhen, CN;
Minqiu Li, Shenzhen, CN;
Feng Hong, Shenzhen, CN;
Chunming Sheng, Shenzhen, CN;
Tinghong Wang, Shenzhen, CN;
Xing Rao, Shenzhen, CN;
Jin Yu, Shenzhen, CN;
Shaolin Zhang, Shenzhen, CN;
Hansi Wang, Shenzhen, CN;
Dingliang Gan, Shenzhen, CN;
Huawei Technologies Co., Ltd., Shenzhen, CN;
Abstract
The present invention relates to the field of communications, in particular, to a server for solving the problem related to the incompatibility between normal blades and multi-processing blades in a conventional server. The server according to an embodiment of the invention includes a backboard, on which backboard wiring and a first slot are disposed. At least two second slots are further disposed on the backboard. Both a first interface configured to be connected to a normal blade and a second interface configured to be connected to a multi-processing blade are disposed on each of the second slots, the first interface being connected to a corresponding Cluster Switch interface disposed on the first slot via the backboard wiring, and the second interface being interconnected directly via the backboard wiring or being connected to a corresponding Symmetrical Multi-Processing Switch interface disposed on the first slot via the backboard wiring.