The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 04, 2011

Filed:

Oct. 08, 2005
Applicants:

Greg Mendolia, Nashua, NH (US);

James Andrew Martin, Iii, Londonderry, NH (US);

Izz Khayo, Nashua, NH (US);

Cornelis Frederik Du Toit, Ellicott City, MD (US);

Heinz Bachmann, Stow, MA (US);

William Mckinzie, Fulton, MD (US);

Inventors:

Greg Mendolia, Nashua, NH (US);

James Andrew Martin, III, Londonderry, NH (US);

Izz Khayo, Nashua, NH (US);

Cornelis Frederik du Toit, Ellicott City, MD (US);

Heinz Bachmann, Stow, MA (US);

William McKinzie, Fulton, MD (US);

Assignee:

Paratek Microwave, Inc., Nashua, NH (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

An embodiment of the present invention provides an apparatus, comprising an input port and a dynamic impedance matching network capable of determining a mismatch at the input port and dynamically changing the RF match by using at least one matching element that includes at least one voltage tunable dielectric capacitor. The matching network may be a 'Pi', a 'T', or “ladder” type network and the apparatus may further comprise at least one directional coupler capable of signal collection by sampling a portion of an incident signal, a reflected signal or both. In an embodiment of the present invention, the apparatus may also include a control and power control & logic unit (PC LU) to convert input analog signals into digital signals and sensing VSWR phase and magnitude and processing the digital signals using an algorithm to give it a voltage value and wherein the voltage values may be compared to values coming from the coupler and once compared and matched, the values may be passed to a Hi Voltage Application Specific Integrated Circuit (HV ASIC) to transfer and distribute compensatory voltages to the matching network elements.


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