The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2010

Filed:

Jun. 24, 2008
Applicants:

Norihisa Yanagihara, Tokyo, JP;

Hajime Kihara, Funabashi, JP;

Tsutomu Yamada, Hitachinaka, JP;

Makiko Naemura, Tokyo, JP;

Kenji Seino, Chiba, JP;

Inventors:

Norihisa Yanagihara, Tokyo, JP;

Hajime Kihara, Funabashi, JP;

Tsutomu Yamada, Hitachinaka, JP;

Makiko Naemura, Tokyo, JP;

Kenji Seino, Chiba, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

To reset only the CPU in a component in an abnormal condition without affecting CPUs of components in a normal condition, a multi-component system, in which a plurality of components each including at least a CPU are connected via a common bus to each other, includes a first reset signal generating unit which generates a reset signal by a switch operation to send the reset signal to respective components and a judge unit which is disposed in each component to determine whether or not resetting of a CPU is allowed. The judge unit inhibits, if the CPU is in a normal condition, the resetting of the CPU in response to the reset signal and resets, if the CPU is in an abnormal condition, the CPU in response to the reset signal.


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