The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2010

Filed:

Jun. 30, 2004
Applicants:

Robert T. Golla, Round Rock, TX (US);

Paul J. Jordan, Austin, TX (US);

Jama I. Barreh, Austin, TX (US);

Inventors:

Robert T. Golla, Round Rock, TX (US);

Paul J. Jordan, Austin, TX (US);

Jama I. Barreh, Austin, TX (US);

Assignee:

Oracle America, Inc., Redwood City, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, a processor comprises a fetch unit and a pick unit. The fetch unit is configured to fetch instructions for execution by the processor. The pick unit is configured to schedule instructions fetched by the fetch unit for execution in the processor. The pick unit is configured to inhibit scheduling a delayed control transfer instruction (DCTI) until a delay slot instruction of the DCTI is available for scheduling. For example, in some embodiments, the pick unit may inhibit scheduling until the delay slot instruction is written to an instruction buffer, until the delay slot instruction is fetched, etc.


Find Patent Forward Citations

Golla, Robert. (2010). Delay slot handling in a processor (U.S. Patent No. 7861063). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7861063

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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