The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2010

Filed:

Nov. 01, 2007
Applicants:

Il-ku Nam, Anyang-si, KR;

Byeong-ha Park, Seongnam-si, KR;

Jong-dae Bae, Suwon-si, KR;

Jung-wook Heo, Yongin-si, KR;

Ho-jung Ju, Seoul, KR;

Hyun-won Mun, Yongin-si, KR;

Jeong-hyun Choi, Yongin-si, KR;

Inventors:

Il-Ku Nam, Anyang-si, KR;

Byeong-Ha Park, Seongnam-si, KR;

Jong-Dae Bae, Suwon-si, KR;

Jung-Wook Heo, Yongin-si, KR;

Ho-Jung Ju, Seoul, KR;

Hyun-Won Mun, Yongin-si, KR;

Jeong-Hyun Choi, Yongin-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/04 (2006.01); H04B 1/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A programmable variable gain amplifier includes at least three amplifiers. A first amplifier is configured to amplify an input signal. A second amplifier, which includes a programmable output load stage, is configured to receive an output signal from the first amplifier and to output a first differential output signal. The output load stage includes multiple first switches and multiple first diode-connected transistors that are open-circuited or short-circuited by the first switches. A third amplifier, which includes a programmable current mirror input stage, is configured to receive the first differential output signal from the second amplifier through the current mirror input stage and to output a second differential output signal. The current mirror input stage includes multiple second switches and multiple second transistors that are open-circuited or short-circuited by the plurality of second switches. The second transistors respectively form current mirrors with the first diode-connected transistors corresponding to the second transistors.


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