The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 28, 2010
Filed:
Jul. 11, 2008
Ian D. O'connor, Jassans-Riottier, FR;
Ilham Hassoune, Fontainebleau, FR;
Ian D. O'Connor, Jassans-Riottier, FR;
Ilham Hassoune, Fontainebleau, FR;
Ecole Centrale de Lyon, Eully Cedex, FR;
Centre National de la Recherche Scientifique (CNRS), Paris Cedex 16, FR;
Abstract
Reconfigurable logic cells based on dual gate MOSFET transistors (DG MOSFETs) including n inputs (A,B), n being greater than or equal to 2 and capable of performing at least four logic functions with which logical signals provided on the n inputs (A,B) may be processed. The cell contains, between the ground and the output (F) of the cell, at least one first branch including n dual gate N-type MOSFET transistors (M,M) in series and n−1 branches in parallel with the first branch, each provided with a dual gate N-type MOSFET transistor (M), each of the logic functions corresponding to a given configuration of the cell. A specific set of control signals (C,C) is applied on the rear gates of at least one portion of the transistors (M,M), each control signal (C,C) being capable of setting the transistor (M,M) to a particular operating mode.