The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 28, 2010
Filed:
Nov. 11, 2008
Shielded gate trench fet with the shield and gate electrodes connected together in non-active region
Nathan Kraft, Pottsville, PA (US);
Christopher Boguslaw Kocon, Mountaintop, PA (US);
Paul Thorup, West Jordan, UT (US);
Nathan Kraft, Pottsville, PA (US);
Christopher Boguslaw Kocon, Mountaintop, PA (US);
Paul Thorup, West Jordan, UT (US);
Fairchild Semiconductor Corporation, South Portland, ME (US);
Abstract
A field effect transistor (FET) includes a plurality of trenches extending into a semiconductor region. Each trench includes a gate electrode and a shield electrode with an inter-electrode dielectric therebetween. A body region extends between each pair of adjacent trenches, and source regions extend in each body region adjacent to the trenches. A first interconnect layer contacts the source and body regions. The plurality of trenches extend in an active region of the FET, and the shield electrode and gate electrode extend out of each trench and into a non-active region of the FET where the shield electrodes and gate electrodes are electrically connected together by a second interconnect layer. The electrical connection between the shield and gate electrodes is made through periodic contact openings formed in a gate runner region of the non-active region.