The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7856611 B1

PDF
Full Text
Expired
Date of Patent:
Dec. 21, 2010

Filed:

Jun. 01, 2005
Applicants:

Eran Pisek, Plano, TX (US);

Jasmin Oz, Plano, TX (US);

Yan Wang, Plano, TX (US);

Inventors:

Eran Pisek, Plano, TX (US);

Jasmin Oz, Plano, TX (US);

Yan Wang, Plano, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 17/693 (2006.01); H03K 19/00 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating an interconnect circuit for coupling a plurality of reconfigurable component blocks that implement a defined function. The method comprises the steps of: 1) determining P possible configurations for implementing the defined function; 2) for each of the P possible configuration, determining a list of required interconnections between the plurality of reconfigurable component blocks; 3) determining from the P lists of required interconnections a minimum number, B, of data buses required to implement the P possible configurations for the defined function; 4) for each of the P possible configurations, determining the interconnections of each of the plurality of reconfigurable component blocks to each of the B buses; and 5) implementing programmable switches capable of coupling a first reconfigurable component block to a first bus only if required to implement at least one of the P possible configurations.


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