The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 21, 2010

Filed:

Jul. 06, 2009
Applicants:

Yuri Azuma, Sayama, JP;

Yoshihiko Yasu, Kodaira, JP;

Yasuto Igarashi, Higashimurayama, JP;

Takashi Kuraishi, Chofu, JP;

Kazumasa Yanagisawa, Kokubunji, JP;

Inventors:

Yuri Azuma, Sayama, JP;

Yoshihiko Yasu, Kodaira, JP;

Yasuto Igarashi, Higashimurayama, JP;

Takashi Kuraishi, Chofu, JP;

Kazumasa Yanagisawa, Kokubunji, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/10 (2006.01); G05F 3/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor integrated circuit device enhanced in design efficiency while achieving multi-functionalization and power saving is to be provided. The semiconductor integrated circuit device has first through third circuit blocks, and is placed in a first power supply state in which the operation of internal circuits in the first circuit block is guaranteed in accordance with an instruction from the third circuit block or a second power supply state in which the operation of the internal circuits is not guaranteed. The second circuit block has an input unit which receives signals supplied from the first circuit block, and the input unit of the second circuit block has an input circuit which, in accordance with a control signal sent from said third circuit block to said second circuit block, causes a specific signal level to be maintained in compliance with the operating voltage of the second circuit block irrespective of the signal supplied from the first circuit block when the third circuit block instructs the second power supply state to the first circuit block.


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